Latch-based designs have many benefits over their flip-flop based counterparts but have limited use partially because most RTL specifications are flop-centric and automatic conversion of FF to latch-based designs is challenging. Most conventional flows convert the FF-based designs into pulsed-latch designs or two-phase latch-based designs controlled by either master-slave clocks or bundled-data asynchronous controllers. Pulsed-latch schemes are an intermediate approach that lies between latch and flip-flop based designs, however, are subject to hold problems and pulse width variations. Whereas two-phase designs are inherently more robust than pulsed-latch designs, multi-phase latch-based designs can sometimes be an attractive alternative. In this talk, I will show some details of a novel conversion algorithm targeting 3-phase bundled-data latch-based designs, evaluate its benefits, and articulate related remaining research challenges.